(R) Celeron(TM) CPU 400MHzCollecting hardware's hard real-time performance data
| name | value |
| Timestamp of submission: | 2009-10-29 07:38:59-06 |
| Submitter: | EEtest28ott09 |
| Machine ID: | PCM3370 |
| Message: | |
| LiveCD version: | 0.16 |
| Linux version: | 2.6.10-adeos-pmmx#9 Wed Apr 20 16:57:51 CEST 2005 |
| ADEOS version: | 2.6r10c3/x86 |
| RTAI version: | 3.2-test3 |
| Fusion version: |
| name | value |
| CPU name: | Mobile (R) Celeron(TM) CPU 400MHz |
| CPU vendor: | GenuineIntel |
| CPU family: | 6 |
| CPU model: | 11 |
| CPU stepping: | 4 |
| CPU cache: | 256 KB |
| CPU frequency: | 400.074 |
The following table shows all PCI devices that were plugged in the testmachine during the testrun.
| category | name |
| IDE interface |  VIA Technologies, Inc. VT82C586A/B/VT82C686/A/B/VT823x/A/C PIPC Bus Master IDE (rev 06) |
| PCI bridge | VIA Technologies, Inc. VT8605 [PM133 AGP] |
| Ethernet controller |  Realtek Semiconductor Co., Ltd. RTL-8139/8139C/8139C+ (rev 10) |
| Bridge | VIA Technologies, Inc. VT82C686 [Apollo Super ACPI] (rev 40) |
| VGA compatible controller | S3 Inc. 86C380 [ProSavageDDR K4M266] (rev 02) |
| Host bridge | VIA Technologies, Inc. VT8605 [ProSavage PM133] |
| ISA bridge | VIA Technologies, Inc. VT82C686 [Apollo Super South] (rev 40) |
The difference in time between the expected switch time and the time when a task is actually called by the scheduler is measured. For this test the RTAI UP scheduler is used.
RTAI README file| name | result |
| RTAI UP latency minimum: | -562 ns |
| RTAI UP latency average: | 3575 ns |
| RTAI UP latency maximum: | 21381 ns |
| RTAI UP latency runtime: | 165 s |
The difference in time between the expected switch time and the time when a task is actually called by the scheduler is measured. For this test the RTAI LXRT scheduler is used.
RTAI README file| name | result |
| RTAI LXRT latency minimum: | 1747 ns |
| RTAI LXRT latency average: | 5755 ns |
| RTAI LXRT latency maximum: | 24243 ns |
| RTAI LXRT latency runtime: | 125 s |
The following table shows the results of a stress test aimed at verifying that the schedulers preempt well under intense load. It is a simple test that combines the latency calibration task with a fast and slow task in such a way to have two levels of preemption, nesting on an odd number of tasks. It shows the maximum jitter of the fast task, which has the second highest priority, and of the slow which has the lowest priority. Reasonable jitters are a clear indication of preemption.
RTAI README file| name | result |
| RTAI UP preempt fastjit: | 23262 ns |
| RTAI UP preempt slowjit: | 24717 ns |
| RTAI UP preempt runtime: | 102 s |
The following table shows the results of a stress test aimed at verifying that the schedulers preempt well under intense load. It is a simple test that combines the latency calibration task with a fast and slow task in such a way to have two levels of preemption, nesting on an odd number of tasks. It shows the maximum jitter of the fast task, which has the second highest priority, and of the slow which has the lowest priority. Reasonable jitters are a clear indication of preemption.
RTAI README file| name | result |
| RTAI LXRT preempt fastjit: | 42475 ns |
| RTAI LXRT preempt slowjit: | 40992 ns |
| RTAI LXRT preempt runtime: | 114 s |
